Louise Helen Crockett

Senior Teaching Fellow

Personal Statement

I am a long-term Strathclyder, having undertaken both undergraduate and postgraduate studies at Strathclyde. I joined the University staff in 2007 as a Research Fellow, and switched title to Teaching Fellow in 2013 (although retaining interests in research and knowledge exchange).

My work focuses on the hardware implementation of Digital Signal Processing (DSP) systems, primarily with an emphasis on communications applications, and I am also developing an interest in image processing. Working in a field of direct relevance to industry really appeals to me. My focus is on Field Programmable Gate Arrays (FPGAs) and related technologies, and the design tools and methods that support them. 

My teaching role involves taking classes on Hardware Description Language (HDL) design, Simulink-based design, and FPGAs, focusing on practical skills that will equip graduates for roles in industry. I am also involved in authoring training materials for the wider academic community (and beyond), based around these themes. 

Expertise & Capabilities

  • Digital Signal Processing (DSP) implementation
  • DSP enabled radio / software defined radio
  • Xilinx FPGAs and design flows
  • Xilinx Zynq System on Chip (SoC)
  • MATLAB & Simulink based design for FPGAs
  • VHDL
  • DSP / FPGA professional training 

Teaching Interests

I currently teach sections of three different classes... Firstly "Digital Electronics Systems" (a 2nd year class), in which students are introduced to the VHDL hardware description language, digital device technologies, and the concept of a design flow. Secondly, the digital part of "Analogue and Digital Systems Design", wherein students learn further VHDL skills and start working with block based design tools. The third is "DSP and FPGA Based Embedded Systems Design", in which I teach the FPGA-focused section of the class. Additionally, I am involved in supervising student projects in these areas. 

Close
  1. A low complexity cyclostationary detector for OFDM signals

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  2. Low-cost frequency-agile filter bank-based multicarrier transceiver implementation

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  3. High-level synthesis for medical image processing on Systems on Chip: a case study

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Projects

(9)
  1. Doctoral Training Partnership (DTP 2016-2017 University of Strathclyde) | Ramsay, Craig

    Project: Research Studentship - Internally AllocatedResearch Studentship (Internally Allocated)

  2. Doctoral Training Partnership (DTP - University of Strathclyde) | Northcote, David

    Project: Research Studentship - Internally AllocatedResearch Studentship (Internally Allocated)

  3. EPSRC Doctoral Training Grant - DTA, University of Strathclyde | Allan, Douglas

    Project: Research Studentship - Internally AllocatedResearch Studentship (Internally Allocated)

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